The Structure of Boolean Neuron for the Optimal Mapping to FPGAs

In this paper, we present a new type of neuron, called Boolean neuron that may be mapped directly to configurable logic blocks (CLBs) of field-programmable gate arrays (FPGAs). The structure and logic of Boolean neuron allow a direct representation of the Boolean neural network architecture to FPGAs. Our approach solves digital design problems especially with respect of the performance and gate count. The additional advantages of Boolean neural networks consist in the reduction of memory space and computation time in comparison to usual neural networks. In the example, we describe the expansion of Boolean output neuron in order to the cascade Boolean neurons with a restricted number of inputs and also the mapping to lookup tables (LUTs).